The present invention relates to watchdog timer circuitry, power integrated circuit (IC) devices and watchdog monitor systems using the same. For example, this invention relates to a technique effectively used in electronic control units (ECUs) for motor vehicles.
A watchdog timer (WDT) is used as a mechanism to detect improper operations due to runaway of a software program running on a microcomputer. More specifically, when the program is normally running on the microcomputer, the WDT is repeatedly initialized a timer count value before a time-out occurs by the microcomputer's operation. Upon occurrence of abnormality due to the runaway or else, the microcomputer does not perform such periodical timer count value initialization operation. In responding to the timeout, the WDT generates a reset-inducing signal and supplies it to the microcomputer.
The microcomputer has a low power consumption mode, such as a stand-by mode, in which is stopped a command executing operation performed by a central processing unit (CPU). Accordingly, in a system having its microcomputer with WDT externally attached thereto, even when the microcomputer is set in the low power consumption mode, the microcomputer is reset in each event if the timer counter's timeout is not suppressed, making it impossible to realize any low power consumption. Then, the WDT's operation is interrupted in the low power consumption state of the microcomputer whereby it will no longer happen that reset is instructed every time the timer counter experiences its timeout. In addition, it is no longer required to perform in each event the processing for initialization of the timer counter's count value by releasing the low power consumption state of the microcomputer just before the timeout of the timer counter. For example, JP-A-2003-300438 discloses therein a technique for causing a CPU to deactivate a watchdog IC having a watchdog timer in responding to turn-off of an ignition switch of motor vehicle and for preventing a reset signal from being output to the CPU. In such case, this document takes into consideration the following fact: with mere use of the watchdog timer circuit for monitoring the CPU operation by means of an active signal to be input from the CPU, once the watchdog timer is deactivated due to the CPU's runaway, the CPU is unable to make the watchdog timer circuit active while at the same time losing the reset functionality with respect to the CPU. In view of this, JP-A-2003-300438 proposes to employ the function of forcibly activating the watchdog timer when communication is performed by a communication interface and even when the ignition switch is driven to turn on.